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Tiled Multicore Processors., , , , , , , , , and 6 other author(s). Multicore Processors and Systems, Springer, (2009)Exploiting Two-Case Delivery for Fast Protected Messaging., , , , , , and . HPCA, page 231-242. IEEE Computer Society, (1998)Scalar Operand Networks: On-Chip Interconnect for ILP in Partitioned Architecture., , , and . HPCA, page 341-353. IEEE Computer Society, (2003)Toward a National Agenda for Broadening Participation of African Americans in Engineering & Computer Science: A Methodological Overview of Phase II., , , , , , and . FIE, page 1-5. IEEE, (2018)Implications of I/O for Gang Scheduled Workloads., , , , and . JSSPP, volume 1291 of Lecture Notes in Computer Science, page 215-237. Springer, (1997)The Raw Microprocessor: A Computational Fabric for Software Circuits and General-Purpose Programs., , , , , , , , , and 8 other author(s). IEEE Micro, 22 (2): 25-35 (2002)Maps: A Compiler-Managed Memory System for Raw Machines., , , and . ISCA, page 4-15. IEEE Computer Society, (1999)Baring It All to Software: Raw Machines., , , , , , , , , and 3 other author(s). IEEE Computer, 30 (9): 86-93 (1997)Scalar Operand Networks., , , and . IEEE Trans. Parallel Distrib. Syst., 16 (2): 145-162 (2005)Evaluation of the Raw Microprocessor: An Exposed-Wire-Delay Architecture for ILP and Streams., , , , , , , , , and 6 other author(s). ISCA, page 2-13. IEEE Computer Society, (2004)