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Disambiguation of "Dasygenis, Minas"

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A Memory Hierarchical Layer Assigning and Prefetching Technique to Overcome the Memory Performance/Energy Bottleneck.

, , , , , and . DATE, page 946-947. IEEE Computer Society, (2005)

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Michael Minas University of Stuttgart

 

Other publications of authors with the same name

A distributed VHDL compiler and simulator accessible from the web.. PATMOS, page 1-7. IEEE, (2014)A combined DMA and application-specific prefetching approach for tackling the memory latency bottleneck., , , , , and . IEEE Trans. VLSI Syst., 14 (3): 279-291 (2006)Exploiting the Pruning Power of Strong Local Consistencies Through Parallelization., and . CoRR, (2017)HLS Accelerated Noise Reduction Approach Using Image Stacking on Xilinx PYNQ., , and . MOCAST, page 1-4. IEEE, (2019)Hardware Acceleration of SHA-256 Algorithm Using NIOS-II Processor., , and . MOCAST, page 1-4. IEEE, (2019)Data-Reuse and Parallel Embedded Architectures for Low-Power, Real-Time Multimedia Applications., , , , , , and . PATMOS, volume 1918 of Lecture Notes in Computer Science, page 243-254. Springer, (2000)A Memory Hierarchical Layer Assigning and Prefetching Technique to Overcome the Memory Performance/Energy Bottleneck., , , , , and . DATE, page 946-947. IEEE Computer Society, (2005)A modified spiral search motion estimation algorithm and its embedded system implementation., , , , and . ISCAS (4), page 3347-3350. IEEE, (2005)Evaluating modern parallelization techniques on block matching algorithms., and . Panhellenic Conference on Informatics, page 20:1-20:6. ACM, (2014)Development of a Hybrid Defensive Embedded System with Face Recognition., and . CSE/EUC/DCABES, page 154-157. IEEE Computer Society, (2016)