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The first observation of p-type electromigration failure in full ruthenium interconnects., , , , , , , and . IRPS, page 6. IEEE, (2018)A tool flow for predicting system level timing failures due to interconnect reliability degradation., , , , , and . ACM Great Lakes Symposium on VLSI, page 291-296. ACM, (2008)A Novel System-Level Physics-Based Electromigration Modelling Framework: Application to the Power Delivery Network., , , , and . SLIP, page 1-7. IEEE, (2021)Microstructure simulation of grain growth in Cu through silicon vias using phase-field modeling., , , , , , , and . Microelectronics Reliability, 55 (5): 765-770 (2015)Design considerations for the mechanical integrity of airgaps in nano-interconnects under chip-package interaction; a numerical investigation., , , , , and . Microelectronics Reliability, (2016)Low-Frequency Noise Measurements to Characterize Cu-Electromigration Down to 44nm Metal Pitch., , , , and . IRPS, page 1-6. IEEE, (2019)Variation-Aware Physics-Based Electromigration Modeling and Experimental Calibration for VLSI Interconnects., , , , , , , and . IRPS, page 1-6. IEEE, (2019)Reliability challenges for barrier/liner system in high aspect ratio through silicon vias., , , , , , , , , and . Microelectronics Reliability, 54 (9-10): 1949-1952 (2014)Study of copper drift during TDDB of intermetal dielectrics by using fully passivated MOS capacitors as test vehicle., , , and . Microelectronics Reliability, 48 (8-9): 1384-1387 (2008)Evaluation of via density and low-k Young's modulus influence on mechanical performance of advanced node multi-level Back-End-Of-Line., , , , , and . Microelectronics Reliability, (2016)