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The Multicluster Architecture: Reducing Processor Cycle Time Through Partitioning., , , and . International Journal of Parallel Programming, 27 (5): 327-356 (1999)Heterogeneous Chip Multiprocessors., , , and . IEEE Computer, 38 (11): 32-38 (2005)Isolation in Commodity Multicore Processors., , , and . IEEE Computer, 40 (6): 49-59 (2007)Timing Analysis and Performance Improvement of MOS VLSI Designs.. IEEE Trans. on CAD of Integrated Circuits and Systems, 6 (4): 650-665 (1987)MIPS: A microprocessor architecture., , , , , , and . MICRO, page 17-22. ACM/IEEE, (1982)Implementing high availability memory with a duplication cache., , , , and . MICRO, page 71-82. IEEE Computer Society, (2008)i2WAP: Improving non-volatile cache lifetime by reducing inter- and intra-set write variations., , , and . HPCA, page 234-245. IEEE Computer Society, (2013)Telepresence Systems With Automatic Preservation of User Head Height, Local Rotation, and Remote Translation., and . ICRA, page 62-68. IEEE, (2005)Timing analysis for nMOS VLSI.. DAC, page 411-418. ACM/IEEE, (1983)A circuit-architecture co-optimization framework for exploring nonvolatile memory hierarchies., , and . TACO, 10 (4): 23:1-23:22 (2013)