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Disambiguation of "Usui, Hiroyuki"

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A low power many-core SoC with two 32-core clusters connected by tree based NoC for multimedia applications.

, , , , , , , , , and . VLSIC, page 150-151. IEEE, (2012)

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A near-future prediction method for low power consumption on a many-core processor., , , , , , , , , and 2 other author(s). DATE, page 1058-1059. EDA Consortium San Jose, CA, USA / ACM DL, (2013)SQUASH: Simple QoS-Aware High-Performance Memory Scheduler for Heterogeneous Systems with Hardware Accelerators., , , and . CoRR, (2015)An evaluation of an energy efficient many-core SoC with parallelized face detection., , , , and . ASP-DAC, page 311-316. IEEE, (2014)Estimation of geometric route distance from its topological distance: application to narrow road networks in Tokyo.. Journal of Geographical Systems, 20 (4): 387-412 (2018)A low power many-core SoC with two 32-core clusters connected by tree based NoC for multimedia applications., , , , , , , , , and . VLSIC, page 150-151. IEEE, (2012)Architecture and Evaluation of Low Power Many-Core SoC with Two 32-Core Clusters., , , , , , , , , and . IEICE Transactions, 97-C (4): 360-368 (2014)A 9.7mW AAC-Decoding, 620mW H.264 720p 60fps Decoding, 8-Core Media Processor with Embedded Forward-Body-Biasing and Power-Gating Circuit in 65nm CMOS Technology., , , , , , , , , and 12 other author(s). ISSCC, page 262-263. IEEE, (2008)Size distribution of urban blocks in the Tokyo Metropolitan Region: estimation by urban block density and road width on the basis of normative plane tessellation., and . International Journal of Geographical Information Science, 32 (1): 120-139 (2018)DASH: Deadline-Aware High-Performance Memory Scheduler for Heterogeneous Systems with Hardware Accelerators., , , and . TACO, 12 (4): 65:1-65:28 (2016)Development of low power many-core SoC for multimedia applications., , , , , and . DATE, page 773-777. EDA Consortium San Jose, CA, USA / ACM DL, (2013)