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A 1.95 GHz Fully Integrated Envelope Elimination and Restoration CMOS Power Amplifier Using Timing Alignment Technique for WCDMA and LTE.

, , , , , , , , , , , , , and . J. Solid-State Circuits, 49 (12): 2915-2924 (2014)

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A 1.95 GHz Fully Integrated Envelope Elimination and Restoration CMOS Power Amplifier Using Timing Alignment Technique for WCDMA and LTE., , , , , , , , , and 4 other author(s). J. Solid-State Circuits, 49 (12): 2915-2924 (2014)A real-time temperature-compensated CMOS RF on-chip power detector with high linearity for wireless applications., , , , and . ESSCIRC, page 349-352. IEEE, (2012)A 28-Gb/s 4.5-pJ/bit transceiver with 1-tap decision feedback equalizer in 28-nm CMOS., , , , , , , , , and 3 other author(s). A-SSCC, page 1-4. IEEE, (2015)A 28.3 Gb/s 7.3 pJ/bit 35 dB backplane transceiver with eye sampling phase adaptation in 28 nm CMOS., , , , , , , , , and 10 other author(s). VLSI Circuits, page 1-2. IEEE, (2016)A fully integrated triple-band CMOS power amplifier for WCDMA mobile handsets., , , , , , , , , and 10 other author(s). ISSCC, page 86-88. IEEE, (2012)A 0.8V 10b 8OMS/s 6.5mW Pipelined ADC with Regulated Overdrive Voltage Biasing., , , and . ISSCC, page 452-614. IEEE, (2007)3.5 A 56Gb/s NRZ-electrical 247mW/lane serial-link transceiver in 28nm CMOS., , , , , , , , , and 7 other author(s). ISSCC, page 64-65. IEEE, (2016)