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Area-sharing cyclic structure MRF cirucits design in ultra-low supply voltage., , , and . ISCAS, page 2353-2356. IEEE, (2015)A 2n scaling scheme for signed RNS integers and its VLSI implementation., , , , and . SCIENCE CHINA Information Sciences, 53 (1): 203-212 (2010)High throughput and hardware efficient FFT architecture for LTE application., , and . WCNC, page 826-831. IEEE, (2012)HW/SW co-simulation platforms for VLSI design., , , and . APCCAS, page 578-581. IEEE, (2008)An optimized architecture for modulo (2n - 2p + 1) multipliers., , , and . IEICE Electronic Express, 12 (1): 20141054 (2015)Hardware Efficient Mixed Radix-25/16/9 FFT for LTE Systems., , , and . IEEE Trans. VLSI Syst., 23 (2): 221-229 (2015)Fault model for on-chip communication and joint equalization and special spacing rules for on-chip bus design., and . Microelectronics Reliability, 52 (6): 1241-1246 (2012)Stochastic Iterative MIMO Detection System: Algorithm and Hardware Design., , and . IEEE Trans. on Circuits and Systems, 62-I (4): 1205-1214 (2015)High performance absolute value calculator based on stochastic computing., , and . ISCAS, page 365-368. IEEE, (2014)iRAF: A Deep Reinforcement Learning Approach for Collaborative Mobile Edge Computing IoT Networks., , , , , and . IEEE Internet of Things Journal, 6 (4): 7011-7024 (2019)