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Disambiguation of "Wille, Robert"

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Identifying a Subset of System Verilog Assertions for Efficient Bounded Model Checking.

, , , , , and . DSD, page 542-549. IEEE Computer Society, (2008)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Fabian Willems University of Stuttgart

PD Dr. Robert Dinnebier University of Stuttgart

Robert Henzel University of Stuttgart

Dr. rer. nat. Robert Seyfang University of Stuttgart

Dr. rer. pol. Robert Rose University of Stuttgart

 

Other publications of authors with the same name

Equivalence Checking of Reversible Circuits., , , and . Multiple-Valued Logic and Soft Computing, 19 (4): 361-378 (2012)Faster manipulation of large quantum circuits using wire label reference diagrams., , and . Microprocessors and Microsystems - Embedded Hardware Design, (2019)Exploiting inherent characteristics of reversible circuits for faster combinational equivalence checking., , , and . DATE, page 175-180. IEEE, (2016)Breaking Landauer's Limit\\Using Quantum-dot Cellular Automata., , , and . CoRR, (2018)Towards Reverse Engineering Reversible Logic., , , , , , and . CoRR, (2017)Accurate Cost Estimation of Memory Systems Inspired by Machine Learning for Computer Vision., , , , , and . DATE, page 1277-1280. IEEE, (2019)Quantified Synthesis of Reversible Logic., , , and . DATE, page 1015-1020. ACM, (2008)Efficient mapping of quantum circuits to the IBM QX architectures., , and . DATE, page 1135-1138. IEEE, (2018)Generating and checking control logic in the HDL-based design of reversible circuits., , , , and . ISED, page 7-12. IEEE, (2016)Guest Editorial Emerging Topics in Multiple-Valued Logic and Its Applications., , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 6 (1): 1-4 (2016)