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An efficient stream memory architecture for heterogeneous multicore processor.

R. Deng, W. Xu, Q. Dou, H. Zhou, Z. Dai, and H. Chen. ISCC, page 287-290. IEEE Computer Society, (2009)

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Hong Chen University of Stuttgart

Yiyin Chen University of Stuttgart

Jun Chen University of Stuttgart

Lu Chen University of Stuttgart

Yingxing Cheng University of Stuttgart

Other publications of authors with the same name

On-line off-line Ranking Support Vector Machine and analysis.B. Gu, J. Wang, and H. Chen. IJCNN, page 1364-1369. IEEE, (2008)The semantic analysis of knowledge map for the traffic violations from the surveillance video big data.Z. Xu, and H. Chen. Comput. Syst. Sci. Eng., (2015)Scene image classification using locality-constrained linear coding based on histogram intersection.H. Chen, K. Xie, H. Wang, and C. Zhao. Multimedia Tools Appl., 77 (3): 4081-4092 (2018)Tackle Balancing Constraint for Incremental Semi-Supervised Support Vector Learning.S. Yu, B. Gu, K. Ning, H. Chen, J. Pei, and H. Huang. KDD, page 1587-1595. ACM, (2019)Conflict-Free Block-with-Stride Access of 2D Storage Structure.R. Song, G. Zeng, S. Liu, and H. Chen. ICA3PP (3), volume 11336 of Lecture Notes in Computer Science, page 618-629. Springer, (2018)An efficient stream memory architecture for heterogeneous multicore processor.R. Deng, W. Xu, Q. Dou, H. Zhou, Z. Dai, and H. Chen. ISCC, page 287-290. IEEE Computer Society, (2009)Mod (2P-1) Shuffle Memory-Access Instructions for FFTs on Vector SIMD DSPs.S. Liu, H. Chen, J. Wan, and Y. Wang. ISVLSI, page 426-430. IEEE Computer Society, (2016)Supporting Efficient Memory Conflicts Reduction Using the DMA Cache Technique in Vector DSPs.S. Liu, S. Chen, H. Chen, S. Chen, and H. Chen. NAS, page 302-308. IEEE Computer Society, (2011)ROSE-NER: Robust Semi-supervised Named Entity Recognition on Insufficient Labeled Data.H. Chen, S. Yuan, and X. Zhang. IJCKG, page 38-44. ACM, (2021)A Fuzzy Support Vector Machine with Weighted Margin for Flight Delay Early Warning.H. Chen, J. Wang, and X. Yan. FSKD (3), page 331-335. IEEE Computer Society, (2008)978-0-7695-3305-6.

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Disambiguation of "Chen, Haiyan"

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An efficient stream memory architecture for heterogeneous multicore processor.

Please choose a person to relate this publication to

Hong Chen University of Stuttgart

Yiyin Chen University of Stuttgart

Jun Chen University of Stuttgart

Lu Chen University of Stuttgart

Yingxing Cheng University of Stuttgart

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Chen, Haiyan"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML An efficient stream memory architecture for heterogeneous multicore processor.

Please choose a person to relate this publication to

Hong Chen University of Stuttgart

Yiyin Chen University of Stuttgart

Jun Chen University of Stuttgart

Lu Chen University of Stuttgart

Yingxing Cheng University of Stuttgart

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

An efficient stream memory architecture for heterogeneous multicore processor.