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Disambiguation of "Ogihara, Takuji"

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An integrated computer aided design system for gate array masterslices: Part 1. Logic reorganization system LORES-2.

, , , , , and . DAC, page 59-65. ACM/IEEE, (1981)

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Other publications of authors with the same name

Testable design and support tool for cell based test., , , and . ITC, page 1065-1071. IEEE Computer Society, (1990)Tri-state bus conflict checking method for ATPG using BDD., , and . ICCAD, page 512-515. IEEE Computer Society / ACM, (1993)ASTA: LSI Design Management System., , and . DAC, page 530-536. IEEE Computer Society Press / ACM, (1987)Test generation for scan design circuits with tri-state modules and bidirectional terminals., , , , and . DAC, page 71-78. ACM/IEEE, (1983)MULTES/IS: An Effective and Reliable Test Generation System for Partial Scan and Non-Scan Synchronous Circuits., , , and . DAC, page 519-524. ACM Press, (1989)Test generation for sequential circuits using individual initial value propagation., , and . ICCAD, page 242-247. IEEE Computer Society, (1988)An integrated computer aided design system for gate array masterslices: Part 1. Logic reorganization system LORES-2., , , , , and . DAC, page 59-65. ACM/IEEE, (1981)Rule-based testability rule check program., , , and . ICCD, page 95-98. IEEE Computer Society, (1990)PATEGE: an automatic DC parametric test generation system for series gated ECL circuits., , and . DAC, page 212-218. ACM, (1985)