PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Ciobanu, Catalin Bogdan"

Author of the publication

copydeleteadd this publication to your clipboard
Scalability Evaluation of a Polymorphic Register File: A CG Case Study.

, , , , and . ARCS, volume 6566 of Lecture Notes in Computer Science, page 13-25. Springer, (2011)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Ciobanu, Catalin Bogdan
add a person with the name Ciobanu, Catalin Bogdan
 

Other publications of authors with the same name

Building High-Performance, Easy-to-Use Polymorphic Parallel Memories with HLS., , , , , , and . VLSI-SoC (Selected Papers), volume 561 of IFIP Advances in Information and Communication Technology, page 53-78. Springer, (2018)HLS Support for Polymorphic Parallel Memories., , , , , , and . VLSI-SoC, page 143-148. IEEE, (2018)Wave field synthesis for 3D audio: architectural prospectives., , and . Conf. Computing Frontiers, page 127-136. ACM, (2009)Towards Application-Centric Parallel Memories., , , and . Euro-Par Workshops, volume 11339 of Lecture Notes in Computer Science, page 481-493. Springer, (2018)A CAD Open Platform for High Performance Reconfigurable Systems in the EXTRA Project., , , , , , , , and . ISVLSI, page 368-373. IEEE Computer Society, (2017)Separable 2D Convolution with Polymorphic Register Files., and . ARCS, volume 7767 of Lecture Notes in Computer Science, page 317-328. Springer, (2013)EXTRA: Towards an Efficient Open Platform for Reconfigurable High Performance Computing., , , , , , , , , and 7 other author(s). CSE, page 339-342. IEEE Computer Society, (2015)The Case for Polymorphic Registers in Dataflow Computing., , , and . International Journal of Parallel Programming, 46 (6): 1185-1219 (2018)FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration., , , , , , , , , and 11 other author(s). Microprocessors and Microsystems - Embedded Hardware Design, 39 (4-5): 321-338 (2015)Real-Time Olivary Neuron Simulations on Dataflow Computing Machines., , , , , , and . ISC, volume 8488 of Lecture Notes in Computer Science, page 487-497. Springer, (2014)