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Cache Template Attacks: Automating Attacks on Inclusive Last-Level Caches.

, , and . USENIX Security Symposium, page 897-912. USENIX Association, (2015)

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Tutorial T1: Designing Secure SoCs., and . VLSI Design, page 3. IEEE Computer Society, (2007)Implementation aspects of the DPA-resistant logic style MDPL., and . ISCAS, IEEE, (2006)An IoT Endpoint System-on-Chip for Secure and Energy-Efficient Near-Sensor Analytics., , , , , , , , , and 2 other author(s). CoRR, (2016)One for All - All for One: Unifying Standard DPA Attacks., , and . IACR Cryptology ePrint Archive, (2009)Towards Fresh Re-Keying with Leakage-Resilient PRFs: Cipher Design Principles and Analysis., , , , , , , and . IACR Cryptology ePrint Archive, (2013)Side-Channel Plaintext-Recovery Attacks on Leakage-Resilient Encryption., , and . IACR Cryptology ePrint Archive, (2016)Automated Detection, Exploitation, and Elimination of Double-Fetch Bugs using Modern CPU Features., , , , , , and . AsiaCCS, page 587-600. ACM, (2018)Fantastic Timers and Where to Find Them: High-Resolution Microarchitectural Attacks in JavaScript., , , and . Financial Cryptography, volume 10322 of Lecture Notes in Computer Science, page 247-267. Springer, (2017)SCAnDroid: Automated Side-Channel Analysis of Android APIs., , and . WISEC, page 224-235. ACM, (2018)Exploiting Data-Usage Statistics for Website Fingerprinting Attacks on Android., , , and . WISEC, page 49-60. ACM, (2016)