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Disambiguation of "Navabi, Zainalabedin"

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Low overhead DFT using CDFG by modifying controller.

, , , and . IET Computers & Digital Techniques, 1 (4): 322-333 (2007)

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Other publications of authors with the same name

Online Network-on-Chip Switch Fault Detection and Diagnosis Using Functional Switch Faults., , , and . J. UCS, 14 (22): 3716-3736 (2008)Fault Simulation for VHDL Based Test Bench and BIST Evaluation., , , and . Asian Test Symposium, page 396-. IEEE Computer Society, (2001)Test Instruction Set (TIS) for High Level Self-Testing of CPU Cores., , and . Asian Test Symposium, page 158-163. IEEE Computer Society, (2004)Configurable architecture for memory BIST., , and . EWDTS, page 1-5. IEEE Computer Society, (2011)Generating test patterns for sequential circuits using random patterns by PLI functions., , , , and . EWDTS, page 456-461. IEEE Computer Society, (2010)Facilitating testability of TLM FIFO: SystemC implementations., , , and . EWDTS, page 428-431. IEEE Computer Society, (2010)Code optimization for enhancing SystemC simulation time., , , and . EWDTS, page 431-434. IEEE Computer Society, (2010)ESL design methodology for architecture exploration., and . EWDTS, page 395-401. IEEE Computer Society, (2010)Architecture design and technical methodology for bus testing., and . EWDTS, page 504-509. IEEE Computer Society, (2010)Dynamic Input Buffer Allocation (DIBA) for Fault Tolerant Ethernet Packet Switching., , and . PDPTA, page 819-823. CSREA Press, (2003)