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Disambiguation of "Cheng, Kwang-Ting"

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An Efficient Sequential SAT Solver With Improved Search Strategies.

, , , , , and . DATE, page 1102-1107. IEEE Computer Society, (2005)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Xiaoyu Cheng University of Stuttgart

Tiffany Cheng University of Stuttgart

Univ. -Prof. Dr. Po Wen Cheng University of Stuttgart

Yingxing Cheng University of Stuttgart

Moon Kwang Jeong University of Stuttgart

 

Other publications of authors with the same name

Compact Test Generation With an Influence Input Measure for Launch-On-Capture Transition Fault Testing., , , and . IEEE Trans. VLSI Syst., 22 (9): 1968-1979 (2014)Safety Property Verification Using Sequential SAT and Bounded Model Checking., , , and . IEEE Design & Test of Computers, 21 (2): 132-143 (2004)An almost full-scan BIST solution-higher fault coverage and shorter test application time., , and . ITC, page 1065-1073. IEEE Computer Society, (1998)Test cost reduction through performance prediction using virtual probe., , , , and . ITC, page 1-9. IEEE Computer Society, (2011)Production-oriented interface testing for PCI-Express by enhanced loop-back technique., , , , , and . ITC, page 10. IEEE Computer Society, (2005)Analysis of Delay Test Effectiveness with a Multiple-Clock Scheme., , , , , , and . ITC, page 407-416. IEEE Computer Society, (2002)Test data analytics - Exploring spatial and test-item correlations in production test data., , , , , , and . ITC, page 1-10. IEEE Computer Society, (2013)Feature engineering with canonical analysis for effective statistical tests screening test escapes., , and . ITC, page 1-10. IEEE Computer Society, (2014)Pattern generation for delay testing and dynamic timing analysisconsidering power-supply noise effects., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 20 (3): 416-425 (2001)A hybrid methodology for switching activities estimation., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 17 (4): 357-366 (1998)