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Modeling and testing of interference faults in the nano NAND Flash memory., , and . DATE, page 527-531. IEEE, (2012)Efficient evaluation model including interconnect resistance effect for large scale RRAM crossbar array matrix computing., , , , , and . SCIENCE CHINA Information Sciences, 62 (2): 22401:1-22401:11 (2019)A TSV repair method for clustered faults., , , and . ASICON, page 1-4. IEEE, (2015)A countermeasure for power analysis to scalar multiplication of ECC hardware., , , and . ASICON, page 1-4. IEEE, (2015)An enhanced decoder for multiple-bit error correcting BCH codes., , , and . ASICON, page 1-4. IEEE, (2015)A UWB mixer with a balanced wide band active balun using crossing centertaped inductor., , , and . ISCAS, page 1588-1591. IEEE, (2013)Design and Implementation of a 2-level FSK Digital Modems Using CORDIC Algorithm., , , and . APCCAS, page 1753-1756. IEEE, (2006)Enhanced error correction against multiple-bit-upset based on BCH code for SRAM., , and . ASICON, page 1-4. IEEE, (2013)Low Power High Performance FinFET Standard Cells Based on Mixed Back Biasing Technology., , , , , and . IEICE Transactions, 99-C (8): 974-983 (2016)Context-adaptive fast motion estimation of HEVC., , , and . ISCAS, page 2784-2787. IEEE, (2015)