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On the use of GP-GPUs for accelerating compute-intensive EDA applications.

, , , , , , and . DATE, page 1357-1366. EDA Consortium San Jose, CA, USA / ACM DL, (2013)

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BulletProof: a defect-tolerant CMP switch architecture., , , , , , , and . HPCA, page 5-16. IEEE Computer Society, (2006)SoCGuard: A runtime verification solution for the functional correctness of SoCs., and . VLSI-SoC, page 49-54. IEEE, (2010)Post-silicon bug diagnosis with inconsistent executions., , and . ICCAD, page 755-761. IEEE Computer Society, (2011)ReliNoC: A reliable network for priority-based on-chip communication., , and . DATE, page 667-672. IEEE, (2011)On the use of GP-GPUs for accelerating compute-intensive EDA applications., , , , , , and . DATE, page 1357-1366. EDA Consortium San Jose, CA, USA / ACM DL, (2013)InVerS: An Incremental Verification System with Circuit Similarity Metrics and Error Visualization., , , and . ISQED, page 487-494. IEEE Computer Society, (2007)Panel: Software practices for verification/testbench management., , , , , and . HLDVT, page 35-37. IEEE Computer Society, (2008)Distance-Guided Hybrid Verification with GUIDO.. HLDVT, page 151. IEEE Computer Society, (2006)ForEVeR: A complementary formal and runtime verification approach to correct NoC functionality., and . ACM Trans. Embedded Comput. Syst., 13 (3s): 104:1-104:30 (2014)ARIADNE: Agnostic Reconfiguration in a Disconnected Network Environment., , , and . PACT, page 298-309. IEEE Computer Society, (2011)