%0 Conference Paper %1 conf/iscas/TschanzNKD05 %A Tschanz, James W. %A Narendra, Siva G. %A Keshavarzi, Ali %A De, Vivek %B ISCAS (1) %D 2005 %I IEEE %K dblp %P 9-12 %T Adaptive circuit techniques to minimize variation impacts on microprocessor performance and power. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2005-1.html#TschanzNKD05 %@ 0-7803-8834-8

@inproceedings{conf/iscas/TschanzNKD05, added-at = {2022-02-28T00:00:00.000+0100}, author = {Tschanz, James W. and Narendra, Siva G. and Keshavarzi, Ali and De, Vivek}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2e538c2a52fbe14b38d914955f6a5580e/dblp}, booktitle = {ISCAS (1)}, crossref = {conf/iscas/2005}, ee = {https://doi.org/10.1109/ISCAS.2005.1464511}, interhash = {38adb76a5a6f2b3438d43e81ef1feea5}, intrahash = {e538c2a52fbe14b38d914955f6a5580e}, isbn = {0-7803-8834-8}, keywords = {dblp}, pages = {9-12}, publisher = {IEEE}, timestamp = {2022-03-01T07:26:25.000+0100}, title = {Adaptive circuit techniques to minimize variation impacts on microprocessor performance and power.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2005-1.html#TschanzNKD05}, year = 2005 }