System-level test, or SLT, is an increasingly important process step in today’s integrated circuit testing flows. Broadly speaking, SLT aims at executing functional workloads in operational modes. In this paper, we consolidate available knowledge about what SLT is precisely and why it is used despite its considerable costs and complexities. We discuss the types or failures covered by SLT, and outline approaches to quality assessment, test generation and root-cause diagnosis in the context of SLT. Observing that the theoretical understanding for all these questions has not yet reached the level of maturity of the more conventional structural and functional test methods, we outline new and promising directions for methodical developments leveraging on recent findings from software engineering.
%0 Conference Paper
%1 9301557
%A Polian, I.
%A Anders, J.
%A Becker, S.
%A Bernardi, P.
%A Chakrabarty, K.
%A ElHamawy, N.
%A Sauer, M.
%A Singh, A.
%A Reorda, M. S.
%A Wagner, S.
%B 2020 IEEE 29th Asian Test Symposium (ATS)
%D 2020
%K hardware-test iste-se myown
%P 1-6
%R 10.1109/ATS49688.2020.9301557
%T Exploring the Mysteries of System-Level Test
%U https://ieeexplore.ieee.org/document/9301557/
%X System-level test, or SLT, is an increasingly important process step in today’s integrated circuit testing flows. Broadly speaking, SLT aims at executing functional workloads in operational modes. In this paper, we consolidate available knowledge about what SLT is precisely and why it is used despite its considerable costs and complexities. We discuss the types or failures covered by SLT, and outline approaches to quality assessment, test generation and root-cause diagnosis in the context of SLT. Observing that the theoretical understanding for all these questions has not yet reached the level of maturity of the more conventional structural and functional test methods, we outline new and promising directions for methodical developments leveraging on recent findings from software engineering.
@inproceedings{9301557,
abstract = {System-level test, or SLT, is an increasingly important process step in today’s integrated circuit testing flows. Broadly speaking, SLT aims at executing functional workloads in operational modes. In this paper, we consolidate available knowledge about what SLT is precisely and why it is used despite its considerable costs and complexities. We discuss the types or failures covered by SLT, and outline approaches to quality assessment, test generation and root-cause diagnosis in the context of SLT. Observing that the theoretical understanding for all these questions has not yet reached the level of maturity of the more conventional structural and functional test methods, we outline new and promising directions for methodical developments leveraging on recent findings from software engineering.},
added-at = {2021-02-09T09:43:11.000+0100},
author = {{Polian}, I. and {Anders}, J. and {Becker}, S. and {Bernardi}, P. and {Chakrabarty}, K. and {ElHamawy}, N. and {Sauer}, M. and {Singh}, A. and {Reorda}, M. S. and {Wagner}, S.},
biburl = {https://puma.ub.uni-stuttgart.de/bibtex/28f6b75af924f872f71450a147292b72e/wagnerst},
booktitle = {2020 IEEE 29th Asian Test Symposium (ATS)},
doi = {10.1109/ATS49688.2020.9301557},
interhash = {c09c7fcf61b38d3a8e5450f5934bfb20},
intrahash = {8f6b75af924f872f71450a147292b72e},
issn = {2377-5386},
keywords = {hardware-test iste-se myown},
month = nov,
pages = {1-6},
timestamp = {2021-02-18T15:46:28.000+0100},
title = {Exploring the Mysteries of System-Level Test},
url = {https://ieeexplore.ieee.org/document/9301557/},
year = 2020
}
