%0 Conference Paper %1 conf/cicc/PalaniH14 %A Palani, Rakesh Kumar %A Harjani, Ramesh %B CICC %D 2014 %I IEEE %K dblp %P 1-4 %T High linearity PVT tolerant 100MS/s rail-to-rail ADC driver with built-in sampler in 65nm CMOS. %U http://dblp.uni-trier.de/db/conf/cicc/cicc2014.html#PalaniH14

@inproceedings{conf/cicc/PalaniH14, added-at = {2014-11-15T00:00:00.000+0100}, author = {Palani, Rakesh Kumar and Harjani, Ramesh}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/20b134ce66e2ad6e8d1544d6a5e8278d2/dblp}, booktitle = {CICC}, crossref = {conf/cicc/2014}, ee = {http://dx.doi.org/10.1109/CICC.2014.6946065}, interhash = {c51ec6fa6fb61935fbd81f1b7bbb7fda}, intrahash = {0b134ce66e2ad6e8d1544d6a5e8278d2}, keywords = {dblp}, pages = {1-4}, publisher = {IEEE}, timestamp = {2016-02-02T12:54:50.000+0100}, title = {High linearity PVT tolerant 100MS/s rail-to-rail ADC driver with built-in sampler in 65nm CMOS.}, url = {http://dblp.uni-trier.de/db/conf/cicc/cicc2014.html#PalaniH14}, year = 2014 }