%0 Journal Article %1 journals/tcas/CheangMM18 %A Cheang, Chak-Fong %A Mak, Pui-In %A Martins, Rui P. %D 2018 %J IEEE Trans. on Circuits and Systems %K dblp %N 9 %P 2889-2902 %T A Hardware-Efficient Feedback Polynomial Topology for DPD Linearization of Power Amplifiers: Theory and FPGA Validation. %U http://dblp.uni-trier.de/db/journals/tcas/tcasI65.html#CheangMM18 %V 65-I

@article{journals/tcas/CheangMM18, added-at = {2019-01-15T00:00:00.000+0100}, author = {Cheang, Chak-Fong and Mak, Pui-In and Martins, Rui P.}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2ccbb6c23d9327a03aa9ff3840b7b9a1d/dblp}, ee = {https://doi.org/10.1109/TCSI.2017.2788082}, interhash = {c198d97f7a8906fb1ee18c781877c725}, intrahash = {ccbb6c23d9327a03aa9ff3840b7b9a1d}, journal = {IEEE Trans. on Circuits and Systems}, keywords = {dblp}, number = 9, pages = {2889-2902}, timestamp = {2019-09-27T11:52:48.000+0200}, title = {A Hardware-Efficient Feedback Polynomial Topology for DPD Linearization of Power Amplifiers: Theory and FPGA Validation.}, url = {http://dblp.uni-trier.de/db/journals/tcas/tcasI65.html#CheangMM18}, volume = {65-I}, year = 2018 }