%0 Journal Article %1 journals/ieicet/YotsuyanagiKK95 %A Yotsuyanagi, Hiroyuki %A Kajihara, Seiji %A Kinoshita, Kozo %D 1995 %J IEICE Transactions %K dblp %N 7 %P 861-867 %T Retiming for Sequential Circuits with a Specified Initial State and Its Application to Testability Enhancement. %U http://dblp.uni-trier.de/db/journals/ieicet/ieicet78d.html#YotsuyanagiKK95 %V 78-D

@article{journals/ieicet/YotsuyanagiKK95, added-at = {2011-08-17T00:00:00.000+0200}, author = {Yotsuyanagi, Hiroyuki and Kajihara, Seiji and Kinoshita, Kozo}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/295f9fe6d2f9505522cd8e74abd4bfc3d/dblp}, ee = {http://search.ieice.org/bin/summary.php?id=e78-d_7_861}, interhash = {b5c6cfc97991269597be9716fa287a64}, intrahash = {95f9fe6d2f9505522cd8e74abd4bfc3d}, journal = {IEICE Transactions}, keywords = {dblp}, number = 7, pages = {861-867}, timestamp = {2016-02-02T09:46:33.000+0100}, title = {Retiming for Sequential Circuits with a Specified Initial State and Its Application to Testability Enhancement.}, url = {http://dblp.uni-trier.de/db/journals/ieicet/ieicet78d.html#YotsuyanagiKK95}, volume = {78-D}, year = 1995 }