%0 Conference Paper %1 conf/vlsic/ChenKSKK18 %A Chen, Gregory K. %A Kumar, Raghavan %A Sumbul, H. Ekin %A Knag, Phil C. %A Krishnamurthy, Ram K. %B VLSI Circuits %D 2018 %I IEEE %K dblp %P 255-256 %T A 4096-Neuron 1M-Synapse 3.8PJ/SOP Spiking Neural Network with On-Chip STDP Learning and Sparse Weights in 10NM FinFET CMOS. %U http://dblp.uni-trier.de/db/conf/vlsic/vlsic2018.html#ChenKSKK18 %@ 978-1-5386-4214-6

@inproceedings{conf/vlsic/ChenKSKK18, added-at = {2018-10-30T00:00:00.000+0100}, author = {Chen, Gregory K. and Kumar, Raghavan and Sumbul, H. Ekin and Knag, Phil C. and Krishnamurthy, Ram K.}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2793f4ba73e197541bca53aca2a133892/dblp}, booktitle = {VLSI Circuits}, crossref = {conf/vlsic/2018}, ee = {https://doi.org/10.1109/VLSIC.2018.8502423}, interhash = {a03a3f64290ceb696fa717d59afe0bd6}, intrahash = {793f4ba73e197541bca53aca2a133892}, isbn = {978-1-5386-4214-6}, keywords = {dblp}, pages = {255-256}, publisher = {IEEE}, timestamp = {2019-09-27T16:36:33.000+0200}, title = {A 4096-Neuron 1M-Synapse 3.8PJ/SOP Spiking Neural Network with On-Chip STDP Learning and Sparse Weights in 10NM FinFET CMOS.}, url = {http://dblp.uni-trier.de/db/conf/vlsic/vlsic2018.html#ChenKSKK18}, year = 2018 }