%0 Conference Paper %1 conf/fpga/ZhuSB14 %A Zhu, Yanzi %A Suo, Peiran %A Bazargan, Kia %B FPGA %D 2014 %E Betz, Vaughn %E Constantinides, George A. %I ACM %K dblp %P 171-180 %T Binary stochastic implementation of digital logic. %U http://dblp.uni-trier.de/db/conf/fpga/fpga2014.html#ZhuSB14 %@ 978-1-4503-2671-1

@inproceedings{conf/fpga/ZhuSB14, added-at = {2018-11-06T00:00:00.000+0100}, author = {Zhu, Yanzi and Suo, Peiran and Bazargan, Kia}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/211b7b95d33b13b434d8b08cd9cab8d78/dblp}, booktitle = {FPGA}, crossref = {conf/fpga/2014}, editor = {Betz, Vaughn and Constantinides, George A.}, ee = {https://doi.org/10.1145/2554688.2554778}, interhash = {99d92f3a7f519f219641ac41bec2b0df}, intrahash = {11b7b95d33b13b434d8b08cd9cab8d78}, isbn = {978-1-4503-2671-1}, keywords = {dblp}, pages = {171-180}, publisher = {ACM}, timestamp = {2019-09-27T13:25:23.000+0200}, title = {Binary stochastic implementation of digital logic.}, url = {http://dblp.uni-trier.de/db/conf/fpga/fpga2014.html#ZhuSB14}, year = 2014 }