%0 Conference Paper %1 conf/ddecs/FiserSVS10 %A Fiser, Petr %A Schmidt, Jan %A Vasícek, Zdenek %A Sekanina, Lukás %B DDECS %D 2010 %E Gramatová, Elena %E Kotásek, Zdenek %E Steininger, Andreas %E Vierhaus, Heinrich Theodor %E Zimmermann, Horst %I IEEE Computer Society %K dblp %P 346-351 %T On logic synthesis of conventionally hard to synthesize circuits using genetic programming. %U http://dblp.uni-trier.de/db/conf/ddecs/ddecs2010.html#FiserSVS10 %@ 978-1-4244-6612-2

@inproceedings{conf/ddecs/FiserSVS10, added-at = {2015-08-21T00:00:00.000+0200}, author = {Fiser, Petr and Schmidt, Jan and Vasícek, Zdenek and Sekanina, Lukás}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2bd1642a2b943c3752fe1950d00f1d2a1/dblp}, booktitle = {DDECS}, crossref = {conf/ddecs/2010}, editor = {Gramatová, Elena and Kotásek, Zdenek and Steininger, Andreas and Vierhaus, Heinrich Theodor and Zimmermann, Horst}, ee = {http://doi.ieeecomputersociety.org/10.1109/DDECS.2010.5491755}, interhash = {81b48f921a8825cc48308ec163c044f4}, intrahash = {bd1642a2b943c3752fe1950d00f1d2a1}, isbn = {978-1-4244-6612-2}, keywords = {dblp}, pages = {346-351}, publisher = {IEEE Computer Society}, timestamp = {2016-02-02T14:40:08.000+0100}, title = {On logic synthesis of conventionally hard to synthesize circuits using genetic programming.}, url = {http://dblp.uni-trier.de/db/conf/ddecs/ddecs2010.html#FiserSVS10}, year = 2010 }