%0 Conference Paper %1 conf/vlsid/NarendraETB04 %A Narendra, Siva G. %A Erraguntla, Vasantha %A Tschanz, James W. %A Borkar, Nitin %B VLSI Design %D 2004 %I IEEE Computer Society %K dblp %P 15-17 %T Design Challenges in Sub-100nm High Performance Microprocessors. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2004.html#NarendraETB04 %@ 0-7695-2072-3

@inproceedings{conf/vlsid/NarendraETB04, added-at = {2022-02-28T00:00:00.000+0100}, author = {Narendra, Siva G. and Erraguntla, Vasantha and Tschanz, James W. and Borkar, Nitin}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/289f73d9be303b287182e2eefd25c60fa/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2004}, ee = {http://doi.ieeecomputersociety.org/10.1109/ICVD.2004.1260894}, interhash = {7d2f20264e4f9d498b0031a8398cbc8f}, intrahash = {89f73d9be303b287182e2eefd25c60fa}, isbn = {0-7695-2072-3}, keywords = {dblp}, pages = {15-17}, publisher = {IEEE Computer Society}, timestamp = {2022-03-01T07:12:42.000+0100}, title = {Design Challenges in Sub-100nm High Performance Microprocessors.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2004.html#NarendraETB04}, year = 2004 }