%0 Journal Article %1 journals/ijertcs/AvasareDGAURP13 %A Avasare, Prabhat %A Declerck, Jeroen %A Glassee, Miguel %A Amin, Amir %A Umans, Erik %A Raghavan, Praveen %A Palkovic, Martin %D 2013 %J IJERTCS %K dblp %N 1 %P 42-63 %T Design Flow for Silicon Chip Implementing Novel Platform Architecture for Wireless Communication. %U http://dblp.uni-trier.de/db/journals/ijertcs/ijertcs4.html#AvasareDGAURP13 %V 4

@article{journals/ijertcs/AvasareDGAURP13, added-at = {2013-09-06T00:00:00.000+0200}, author = {Avasare, Prabhat and Declerck, Jeroen and Glassee, Miguel and Amin, Amir and Umans, Erik and Raghavan, Praveen and Palkovic, Martin}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2a72a47254fbc9f6f6b5da19d2df9e0fe/dblp}, ee = {http://dx.doi.org/10.4018/jertcs.2013010103}, interhash = {677907b16f189c541f92321c276b0eb8}, intrahash = {a72a47254fbc9f6f6b5da19d2df9e0fe}, journal = {IJERTCS}, keywords = {dblp}, number = 1, pages = {42-63}, timestamp = {2016-02-02T01:48:06.000+0100}, title = {Design Flow for Silicon Chip Implementing Novel Platform Architecture for Wireless Communication.}, url = {http://dblp.uni-trier.de/db/journals/ijertcs/ijertcs4.html#AvasareDGAURP13}, volume = 4, year = 2013 }