%0 Conference Paper %1 conf/fpl/ClaverL07 %A Claver, José M. %A León, Germán %B FPL %D 2007 %E Bertels, Koen %E Najjar, Walid A. %E van Genderen, Arjan J. %E Vassiliadis, Stamatis %I IEEE %K dblp %P 629-632 %T High Level Power Optimization by Type Inference on the Generation of Application Specific Circuits on FPGAs. %U http://dblp.uni-trier.de/db/conf/fpl/fpl2007.html#ClaverL07 %@ 1-4244-1060-6

@inproceedings{conf/fpl/ClaverL07, added-at = {2013-03-03T00:00:00.000+0100}, author = {Claver, José M. and León, Germán}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/21e2ade081ecd52219b3efc313bad51ca/dblp}, booktitle = {FPL}, crossref = {conf/fpl/2007}, editor = {Bertels, Koen and Najjar, Walid A. and van Genderen, Arjan J. and Vassiliadis, Stamatis}, ee = {http://dx.doi.org/10.1109/FPL.2007.4380733}, interhash = {6251df31a9221432d5743383a565c84a}, intrahash = {1e2ade081ecd52219b3efc313bad51ca}, isbn = {1-4244-1060-6}, keywords = {dblp}, pages = {629-632}, publisher = {IEEE}, timestamp = {2016-04-27T09:33:28.000+0200}, title = {High Level Power Optimization by Type Inference on the Generation of Application Specific Circuits on FPGAs.}, url = {http://dblp.uni-trier.de/db/conf/fpl/fpl2007.html#ClaverL07}, year = 2007 }