%0 Conference Paper %1 conf/fpga/LewisABBBCGHLLLMMPPPRRSSYCR05 %A Lewis, David M. %A Ahmed, Elias %A Baeckler, Gregg %A Betz, Vaughn %A Bourgeault, Mark %A Cashman, David %A Galloway, David R. %A Hutton, Mike %A Lane, Christopher %A Lee, Andy %A Leventis, Paul %A Marquardt, Sandy %A McClintock, Cameron %A Padalia, Ketan %A Pedersen, Bruce %A Powell, Giles %A Ratchev, Boris %A Reddy, Srinivas %A Schleicher, Jay %A Stevens, Kevin %A Yuan, Richard %A Cliff, Richard %A Rose, Jonathan %B FPGA %D 2005 %E Schmit, Herman %E Wilton, Steven J. E. %I ACM %K dblp %P 14-20 %T The Stratix II logic and routing architecture. %U http://dblp.uni-trier.de/db/conf/fpga/fpga2005.html#LewisABBBCGHLLLMMPPPRRSSYCR05 %@ 1-59593-029-9

@inproceedings{conf/fpga/LewisABBBCGHLLLMMPPPRRSSYCR05, added-at = {2018-11-06T00:00:00.000+0100}, author = {Lewis, David M. and Ahmed, Elias and Baeckler, Gregg and Betz, Vaughn and Bourgeault, Mark and Cashman, David and Galloway, David R. and Hutton, Mike and Lane, Christopher and Lee, Andy and Leventis, Paul and Marquardt, Sandy and McClintock, Cameron and Padalia, Ketan and Pedersen, Bruce and Powell, Giles and Ratchev, Boris and Reddy, Srinivas and Schleicher, Jay and Stevens, Kevin and Yuan, Richard and Cliff, Richard and Rose, Jonathan}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2ef77133a04e346eaa958578364822e57/dblp}, booktitle = {FPGA}, crossref = {conf/fpga/2005}, editor = {Schmit, Herman and Wilton, Steven J. E.}, ee = {https://doi.org/10.1145/1046192.1046195}, interhash = {4b864745a14facfb41fe8ee470083929}, intrahash = {ef77133a04e346eaa958578364822e57}, isbn = {1-59593-029-9}, keywords = {dblp}, pages = {14-20}, publisher = {ACM}, timestamp = {2019-09-27T13:25:08.000+0200}, title = {The Stratix II logic and routing architecture.}, url = {http://dblp.uni-trier.de/db/conf/fpga/fpga2005.html#LewisABBBCGHLLLMMPPPRRSSYCR05}, year = 2005 }