%0 Journal Article %1 journals/tvlsi/MaricAV14 %A Maric, Bojan %A Abella, Jaume %A Valero, Mateo %D 2014 %J IEEE Trans. VLSI Syst. %K dblp %N 10 %P 2211-2215 %T Analyzing the Efficiency of L1 Caches for Reliable Hybrid-Voltage Operation Using EDC Codes. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi22.html#MaricAV14 %V 22

@article{journals/tvlsi/MaricAV14, added-at = {2019-06-02T00:00:00.000+0200}, author = {Maric, Bojan and Abella, Jaume and Valero, Mateo}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/28f96a3dc52b034fb3e5fe06f33f4f225/dblp}, ee = {https://www.wikidata.org/entity/Q61730806}, interhash = {3967ae3ad37c33b4206014e897deafdc}, intrahash = {8f96a3dc52b034fb3e5fe06f33f4f225}, journal = {IEEE Trans. VLSI Syst.}, keywords = {dblp}, number = 10, pages = {2211-2215}, timestamp = {2019-09-27T06:53:36.000+0200}, title = {Analyzing the Efficiency of L1 Caches for Reliable Hybrid-Voltage Operation Using EDC Codes.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi22.html#MaricAV14}, volume = 22, year = 2014 }