%0 Conference Paper %1 conf/isscc/PiloRBGLT08 %A Pilo, Harold %A Ramadurai, Vaidyanathan %A Braceras, Geordie %A Gabric, John %A Lamphier, Steve %A Tan, Yue %B ISSCC %D 2008 %I IEEE %K dblp %P 378-379 %T A 450ps Access-Time SRAM Macro in 45nm SOI Featuring a Two-Stage Sensing-Scheme and Dynamic Power Management. %U http://dblp.uni-trier.de/db/conf/isscc/isscc2008.html#PiloRBGLT08 %@ 978-1-4244-2010-0

@inproceedings{conf/isscc/PiloRBGLT08, added-at = {2013-09-27T00:00:00.000+0200}, author = {Pilo, Harold and Ramadurai, Vaidyanathan and Braceras, Geordie and Gabric, John and Lamphier, Steve and Tan, Yue}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/208fa6aab69287ee2d263c8a62d3f73e3/dblp}, booktitle = {ISSCC}, crossref = {conf/isscc/2008}, ee = {http://dx.doi.org/10.1109/ISSCC.2008.4523215}, interhash = {33124efc709e531b7032139f8ec07d16}, intrahash = {08fa6aab69287ee2d263c8a62d3f73e3}, isbn = {978-1-4244-2010-0}, keywords = {dblp}, pages = {378-379}, publisher = {IEEE}, timestamp = {2016-02-02T12:12:57.000+0100}, title = {A 450ps Access-Time SRAM Macro in 45nm SOI Featuring a Two-Stage Sensing-Scheme and Dynamic Power Management.}, url = {http://dblp.uni-trier.de/db/conf/isscc/isscc2008.html#PiloRBGLT08}, year = 2008 }