Please log in to take part in the discussion (add own reviews or comments).
Cite this publication
More citation styles
- please select -
%0 Journal Article
%1 journals/mr/PagliariniSNN12
%A Pagliarini, Samuel N.
%A dos Santos, G. G.
%A de Barros Naviner, Lirida Alves
%A Naviner, Jean-François
%D 2012
%J Microelectronics Reliability
%K dblp
%N 9-10
%P 1843-1847
%T Exploring the feasibility of selective hardening for combinational logic.
%U http://dblp.uni-trier.de/db/journals/mr/mr52.html#PagliariniSNN12
%V 52
@article{journals/mr/PagliariniSNN12,
added-at = {2014-09-13T00:00:00.000+0200},
author = {Pagliarini, Samuel N. and dos Santos, G. G. and de Barros Naviner, Lirida Alves and Naviner, Jean-François},
biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2a03be2604292bc2ea6b603665735bd7b/dblp},
ee = {http://dx.doi.org/10.1016/j.microrel.2012.06.042},
interhash = {2f32381ebb628c41ae7fadbe91de5ff2},
intrahash = {a03be2604292bc2ea6b603665735bd7b},
journal = {Microelectronics Reliability},
keywords = {dblp},
number = {9-10},
pages = {1843-1847},
timestamp = {2016-02-02T02:01:04.000+0100},
title = {Exploring the feasibility of selective hardening for combinational logic.},
url = {http://dblp.uni-trier.de/db/journals/mr/mr52.html#PagliariniSNN12},
volume = 52,
year = 2012
}