%0 Journal Article %1 journals/tc/WangXWYZNWW14 %A Wang, Zhehui %A Xu, Jiang %A Wu, Xiaowen %A Ye, Yaoyao %A Zhang, Wei %A Nikdast, Mahdi %A Wang, Xuan %A Wang, Zhe %D 2014 %J IEEE Trans. Computers %K dblp %N 6 %P 1446-1459 %T Floorplan Optimization of Fat-Tree-Based Networks-on-Chip for Chip Multiprocessors. %U http://dblp.uni-trier.de/db/journals/tc/tc63.html#WangXWYZNWW14 %V 63

@article{journals/tc/WangXWYZNWW14, added-at = {2015-12-22T00:00:00.000+0100}, author = {Wang, Zhehui and Xu, Jiang and Wu, Xiaowen and Ye, Yaoyao and Zhang, Wei and Nikdast, Mahdi and Wang, Xuan and Wang, Zhe}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2ff298e86c7acd0666a75ed790c90d0fa/dblp}, ee = {http://doi.ieeecomputersociety.org/10.1109/TC.2012.295}, interhash = {0d340c450c81dcf22571d784cfe33d60}, intrahash = {ff298e86c7acd0666a75ed790c90d0fa}, journal = {IEEE Trans. Computers}, keywords = {dblp}, number = 6, pages = {1446-1459}, timestamp = {2016-02-02T02:36:59.000+0100}, title = {Floorplan Optimization of Fat-Tree-Based Networks-on-Chip for Chip Multiprocessors.}, url = {http://dblp.uni-trier.de/db/journals/tc/tc63.html#WangXWYZNWW14}, volume = 63, year = 2014 }