%0 Conference Paper %1 conf/vts/BhaskaranSNAL16 %A Bhaskaran, Bonita %A Sanghani, Amit %A Narayanun, Kaushik %A Abdollahian, Ayub %A Laknaur, Amit %B VTS %D 2016 %I IEEE Computer Society %K dblp %P 1-6 %T Test method and scheme for low-power validation in modern SOC integrated circuits. %U http://dblp.uni-trier.de/db/conf/vts/vts2016.html#BhaskaranSNAL16 %@ 978-1-4673-8454-4

@inproceedings{conf/vts/BhaskaranSNAL16, added-at = {2016-06-09T00:00:00.000+0200}, author = {Bhaskaran, Bonita and Sanghani, Amit and Narayanun, Kaushik and Abdollahian, Ayub and Laknaur, Amit}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/2577ad6bd8454969a3a1cc077f627cb1f/dblp}, booktitle = {VTS}, crossref = {conf/vts/2016}, ee = {http://doi.ieeecomputersociety.org/10.1109/VTS.2016.7477310}, interhash = {0901a959b2062935c8ce756043e4204f}, intrahash = {577ad6bd8454969a3a1cc077f627cb1f}, isbn = {978-1-4673-8454-4}, keywords = {dblp}, pages = {1-6}, publisher = {IEEE Computer Society}, timestamp = {2016-06-10T09:33:06.000+0200}, title = {Test method and scheme for low-power validation in modern SOC integrated circuits.}, url = {http://dblp.uni-trier.de/db/conf/vts/vts2016.html#BhaskaranSNAL16}, year = 2016 }