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FlexPRET: A processor platform for mixed-criticality systems.

, , , and . RTAS, page 101-110. IEEE Computer Society, (2014)

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Design and Prototyping of Digital Signal Processing (DSP) Systems: Introduction., , and . HICSS (1), page 56-57. IEEE Computer Society, (1994)Hierarchical Concurrent Finite State Machines in Ptolemy., and . ACSD, page 34-40. IEEE Computer Society, (1998)Converting graphical DSP programs into memory constrained software prototypes., , and . RSP, page 194-200. IEEE Computer Society, (1995)Latency-constrained Resynchronization for Multiprocessor DSP Implementation., , and . ASAP, page 365-380. IEEE Computer Society, (1996)Dynamic-level scheduling for heterogeneous processor networks., and . SPDP, page 42-49. IEEE Computer Society, (1990)Ramifications of software implementation and deployment: A case study on yaw moment controller design., , and . ACC, page 2014-2019. IEEE, (2015)Deploying Hard Real-Time Control Software on Chip-Multiprocessors., , and . RTCSA, page 283-292. IEEE Computer Society, (2010)A framework for comparing models of computation., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 17 (12): 1217-1229 (1998)Causality interfaces for actor networks., and . ACM Trans. Embedded Comput. Syst., 7 (3): 29:1-29:35 (2008)Simulation of Multipath Impulse Response for Indoor Wireless Optical Channels., , , , and . IEEE Journal on Selected Areas in Communications, 11 (3): 367-379 (1993)