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The Design of COMPASS: An Execution Driven Simulator for Commercial Applications Running on Shared Memory Multiprocessors.

, , , , , and . IPPS/SPDP, page 503-509. IEEE Computer Society, (1998)

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Efficient Mapping of Applications on Cache Based Multiprocessors., and . J. Parallel Distrib. Comput., 19 (3): 179-191 (1993)The Misprediction Recovery Cache., , and . International Journal of Parallel Programming, 26 (4): 383-415 (1998)Multistage bus network (MBN): an interconnection network for cache coherent multiprocessors., and . SPDP, page 780-787. IEEE Computer Society, (1991)Accuracy and Speedup of Parallel Trace-Driven Architectural Simulation., , , , and . IPPS, page 39-44. IEEE Computer Society, (1997)Using Switch Directories to Speed Up Cache-to-Cache Transfers in CC-NUMA Multiprocessors., , and . IPDPS, page 721-728. IEEE Computer Society, (2000)Coherence Controller Architectures for SMP-Based CC-NUMA Multiprocessors., , , and . ISCA, page 219-228. ACM, (1997)MemorIES: A Programmable, Real-Time Hardware Emulation Tool for Multiprocessor Server Design., , , , , and . ASPLOS, page 37-48. ACM Press, (2000)High-performance server systems and the next generation of online games., , , , and . IBM Systems Journal, 45 (1): 103-118 (2006)Preface., , and . IBM Journal of Research and Development, 51 (5): 501-502 (2007)Shared cache architectures for decision support systems., , and . Perform. Eval., 49 (1/4): 283-298 (2002)