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A 28-nm 75-fsrms Analog Fractional- $N$ Sampling PLL With a Highly Linear DTC Incorporating Background DTC Gain Calibration and Reference Clock Duty Cycle Correction.

W. Wu, C. Yao, K. Godbole, R. Ni, P. Chiang, Y. Han, Y. Zuo, A. Verma, I. Lu, S. Son, and T. Cho. J. Solid-State Circuits, 54 (5): 1254-1265 (2019)

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Hyeongrae Cho University of Stuttgart

Michel Choudalakis University of Stuttgart

Gretchen Chojnacki-Herbers University of Stuttgart

Dipl.-Ing. Thomas Kuestner

Scan time reduction in DWI of the pancreas using simultaneous multislice technique with different acceleration factors: how fast can we go?J. Taron, P. Martirosian, T. Küstner, M. Notohamiprodjo, J. Weiß, A. Othman, K. Nikolaou, and C. Schraml. Proceedings of the International Society for Magnetic Resonance in Medicine (ISMRM), Honolulu, Hawaii, USA, (April 2017)The use of a generalized reconstruction by inversion of coupled systems (GRICS) approach for generic respiratory motion correction in PET/MR imagingH. Fayad, F. Odille, H. Schmidt, C. Würslin, T. Küstner, J. Felblinger, and D. Visvikis. Physics in medicine and biology, 60 (6): 2529-46 (March 2015)In-vivo MR-derived non-rigid motion correction of simultaneously acquired PETT. Küstner, C. Würslin, S. Gatidis, P. Martirosian, N. Schwenzer, B. Yang, and H. Schmidt. Proceedings of the International Society for Magnetic Resonance in Medicine (ISMRM), Toronto, Canada, (June 2015)

King Cho Wong University of Stuttgart

Other publications of authors with the same name

A Sub-6-GHz 5G New Radio RF Transceiver Supporting EN-DC With 3.15-Gb/s DL and 1.27-Gb/s UL in 14-nm FinFET CMOS.J. Lee, K. Son, H. Lim, D. Jeong, I. Jong, S. Baek, J. Lee, R. Ni, Y. Zuo, C. Yao and 11 other author(s). J. Solid-State Circuits, 54 (12): 3541-3552 (2019)86.55% Peak efficiency envelope modulator for 1.5W 10MHz LTE PA without AC coupling capacitor.S. Sung, S. Hong, J. Bang, J. Paek, S. Lee, T. Cho, and G. Cho. VLSIC, page 342-. IEEE, (2015)A 28-nm 75-fsrms Analog Fractional- $N$ Sampling PLL With a Highly Linear DTC Incorporating Background DTC Gain Calibration and Reference Clock Duty Cycle Correction.W. Wu, C. Yao, K. Godbole, R. Ni, P. Chiang, Y. Han, Y. Zuo, A. Verma, I. Lu, S. Son and 1 other author(s). J. Solid-State Circuits, 54 (5): 1254-1265 (2019)A Ka-band Phase Shifting Low Noise Amplifier with Gain Error Compensation for 5G RF beam forming array using 14nm FinFET CMOS.Y. Kim, P. Jang, J. Lim, W. Ko, S. Heo, J. Lee, and T. Cho. ISCAS, page 1-4. IEEE, (2018)20.7 An RF-PA supply modulator achieving 83% efficiency and -136dBm/Hz noise for LTE-40MHz and GSM 35dBm applications.J. Paek, Y. Youn, J. Choi, D. Kim, J. Jung, Y. Choo, S. Lee, S. Lee, T. Cho, and I. Kang. ISSCC, page 354-355. IEEE, (2016)A - 137 dBm/Hz Noise, 82% Efficiency AC-Coupled Hybrid Supply Modulator With Integrated Buck-Boost Converter.J. Paek, S. Lee, Y. Youn, D. Kim, J. Choi, J. Jung, Y. Choo, S. Lee, J. Han, and T. Cho. J. Solid-State Circuits, 51 (11): 2757-2768 (2016)A Dynamically Biased Multiband 2G/3G/4G Cellular Transmitter in 28 nm CMOS.S. Seth, D. Kwon, S. Venugopalan, S. Son, Y. Zuo, V. Bhagavatula, J. Lim, D. Oh, and T. Cho. J. Solid-State Circuits, 51 (5): 1096-1108 (2016)A 90ns/V Fast-Transition Symbol-Power-Tracking Buck Converter for 5G mm-Wave Phased-Array Transceiver.J. Paek, T. Nomiyama, J. Han, I. Kim, Y. Lee, D. Kim, E. Park, S. Lee, J. Lee, T. Cho and 1 other author(s). ISSCC, page 240-242. IEEE, (2019)6.1 A Low-Power and Low-Cost 14nm FinFET RFIC Supporting Legacy Cellular and 5G FR1.J. Lee, B. Kang, S. Joo, S. Lee, J. Lee, S. Kang, I. Jo, S. Ahn, J. Lee, J. Bae and 13 other author(s). ISSCC, page 90-92. IEEE, (2021)2.7 A hybrid supply modulator with 10dB ET operation dynamic range achieving a PAE of 42.6% at 27.0dBm PA output power.S. Lee, J. Paek, J. Jung, Y. Youn, S. Lee, M. Cho, J. Han, J. Choi, Y. Joo, T. Nomiyama and 5 other author(s). ISSCC, page 1-3. IEEE, (2015)

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Disambiguation of "Cho, Thomas Byunghak"