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Disambiguation of "Park, Gi-Ho"

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Sub-grouped superblock management for high-performance flash storages.

, , , and . IEICE Electronic Express, 6 (6): 297-303 (2009)

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Sumee Park

Soo Yong Park University of Stuttgart

Jan Giesselmann

Shreyas Giridharan University of Stuttgart

Cheng-I Ho University of Stuttgart

 

Other publications of authors with the same name

Low-Power Embedded Processor Design Using Branch Direction., , , and . IEICE Transactions, 92-A (12): 3180-3181 (2009)Performance monitor unit design for an AXI-based multi-core SoC platform., , , , , and . SAC, page 1565-1572. ACM, (2007)An analytical model based on performance demand of workload for energy-efficient heterogeneous multicore systems., , , and . J. Parallel Distrib. Comput., (2017)Design and implementation of Performance Analysis Unit (PAU) for AXI-based multi-core System on Chip (SOC)., , , , and . Microprocessors and Microsystems - Embedded Hardware Design, 34 (2-4): 102-116 (2010)Dynamic and selective low power data TLB system., , and . Microprocessors and Microsystems, 28 (3): 95-105 (2004)An integrated mapping table for hybrid FTL with fault-tolerant address cache., , , and . IEICE Electronic Express, 6 (7): 368-374 (2009)Accelerating Application Start-up with Nonvolatile Memory in Android Systems., , , , and . IEEE Micro, 35 (1): 15-25 (2015)Adaptive prefetching scheme for exploiting massive memory bandwidth of 3-D IC technology., and . 3DIC, page 1-5. IEEE, (2011)A Power Efficient Cache Structure for Embedded Processors Based on the Dual Cache Structure., , , , and . LCTES, volume 1985 of Lecture Notes in Computer Science, page 162-177. Springer, (2000)Phase detection based data prefetching for utilizing memory bandwidth of 3D integrated circuits., , and . 3DIC, page 1-5. IEEE, (2013)