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Does arithmetic logic dominate data movement? a systematic comparison of energy-efficiency for FFT accelerators.

, , , and . ASAP, page 66-67. IEEE Computer Society, (2015)

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Double Throughput Multiply-Accumulate unit for FlexCore processor enhancements., , and . IPDPS, page 1-7. IEEE, (2009)Data-Width-Driven Power Gating of Integer Arithmetic Circuits., and . ISVLSI, page 237-242. IEEE Computer Society, (2012)High-speed, energy-efficient 2-cycle Multiply-Accumulate architecture., , and . SoCC, page 119-122. IEEE, (2009)Viterbi Accelerator for Embedded Processor Datapaths., , , , , , and . ASAP, page 133-140. IEEE Computer Society, (2012)A Data Layout Transformation (DLT) accelerator: Architectural support for data movement optimization in accelerated-centric heterogeneous systems., , and . DATE, page 1489-1492. IEEE, (2016)A low complexity, low power, programmable QRS detector based on wavelet transform for Implantable Pacemaker IC., , , , , and . SoCC, page 160-163. IEEE, (2006)Does arithmetic logic dominate data movement? a systematic comparison of energy-efficiency for FFT accelerators., , , and . ASAP, page 66-67. IEEE Computer Society, (2015)On catastrophic forgetting and mode collapse in Generative Adversarial Networks., , and . CoRR, (2018)Word Sense Induction Using Correlated Topic Model., and . IALP, page 41-44. IEEE Computer Society, (2012)10x10: A Case Study in Highly-Programmable and Energy-Efficient Heterogeneous Federated Architecture., , , , and . SIGARCH Computer Architecture News, 43 (2): 2-9 (2015)