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A High Performance and Memory Efficient LU Decomposer on FPGAs.

, , , and . IEEE Trans. Computers, 61 (3): 366-378 (2012)

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A Parameterized Architecture Model in High Level Synthesis for Image Processing Applications., and . ASP-DAC, page 523-528. IEEE Computer Society, (2007)Multiple Kernel k-Means Clustering with Matrix-Induced Regularization., , , , and . AAAI, page 1888-1894. AAAI Press, (2016)ELM based multiple kernel k-means with diversity-induced regularization., , , and . IJCNN, page 2699-2705. IEEE, (2016)A Novel Design of Flexible Crypto Coprocessor and Its Application., , , and . ACA, volume 451 of Communications in Computer and Information Science, page 128-139. Springer, (2014)Throughput-Optimized FPGA Accelerator for Deep Convolutional Neural Networks., , , , , , and . TRETS, 10 (3): 17:1-17:23 (2017)An efficient CPU-GPU hybrid parallel implementation for DVB-RCS2 receiver., , , and . Concurrency and Computation: Practice and Experience, (2018)A Unified Co-Processor Architecture for Matrix Decomposition., , , , , and . J. Comput. Sci. Technol., 25 (4): 874-885 (2010)VLIW coprocessor for IEEE-754 quadruple-precision elementary functions., , , , , , and . TACO, 10 (3): 12:1-12:22 (2013)Classification of Tiangong-1 hyperspectral remote sensing image via contextual sparse coding., , , , and . ICMLC, page 128-133. IEEE, (2015)Optimized deep belief networks on CUDA GPUs., , , , and . IJCNN, page 1-8. IEEE, (2015)