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Exploiting Errors for Efficiency: A Survey from Circuits to Applications.

P. Stanley-Marbell, A. Alaghi, M. Carbin, E. Darulova, L. Dolecek, A. Gerstlauer, G. Gillani, D. Jevdjic, T. Moreau, M. Cacciotti, A. Daglis, N. Jerger, B. Falsafi, S. Misailovic, A. Sampson, and D. Zufferey. ACM Comput. Surv., 53 (3): 51:1-51:39 (2020)

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Unison Cache: A Scalable and Effective Die-Stacked DRAM Cache.D. Jevdjic, G. Loh, C. Kaynak, and B. Falsafi. MICRO, page 25-37. IEEE, (2014)Quantifying the Mismatch between Emerging Scale-Out Applications and Modern Processors.M. Ferdman, A. Adileh, Y. Koçberber, S. Volos, M. Alisafaee, D. Jevdjic, C. Kaynak, A. Popescu, A. Ailamaki, and B. Falsafi. ACM Trans. Comput. Syst., 30 (4): 15:1-15:24 (2012)Scale-out processors.P. Lotfi-Kamran, B. Grot, M. Ferdman, S. Volos, Y. Koçberber, J. Picorel, A. Adileh, D. Jevdjic, S. Idgunji, E. Özer and 1 other author(s). ISCA, page 500-511. IEEE Computer Society, (2012)A Case for Specialized Processors for Scale-Out Workloads.M. Ferdman, A. Adileh, Y. Koçberber, S. Volos, M. Alisafaee, D. Jevdjic, C. Kaynak, A. Popescu, A. Ailamaki, and B. Falsafi. IEEE Micro, 34 (3): 31-42 (2014)Clustering Billions of Reads for DNA Data Storage.C. Rashtchian, K. Makarychev, M. Rácz, S. Ang, D. Jevdjic, S. Yekhanin, L. Ceze, and K. Strauss. NIPS, page 3360-3371. (2017)Die-stacked DRAM caches for servers: hit ratio, latency, or bandwidth? have it all with footprint cache.D. Jevdjic, S. Volos, and B. Falsafi. ISCA, page 404-415. ACM, (2013)Thermal characterization of cloud workloads on a power-efficient server-on-chip.D. Milojevic, S. Idgunji, D. Jevdjic, E. Özer, P. Lotfi-Kamran, A. Panteli, A. Prodromou, C. Nicopoulos, D. Hardy, B. Falsafi and 1 other author(s). ICCD, page 175-182. IEEE Computer Society, (2012)From A to E: analyzing TPC's OLTP benchmarks: the obsolete, the ubiquitous, the unexplored.P. Tözün, I. Pandis, C. Kaynak, D. Jevdjic, and A. Ailamaki. EDBT, page 17-28. ACM, (2013)Exploiting Errors for Efficiency: A Survey from Circuits to Applications.P. Stanley-Marbell, A. Alaghi, M. Carbin, E. Darulova, L. Dolecek, A. Gerstlauer, G. Gillani, D. Jevdjic, T. Moreau, M. Cacciotti and 6 other author(s). ACM Comput. Surv., 53 (3): 51:1-51:39 (2020)Exploiting Errors for Efficiency: A Survey from Circuits to Algorithms.P. Stanley-Marbell, A. Alaghi, M. Carbin, E. Darulova, L. Dolecek, A. Gerstlauer, G. Gillani, D. Jevdjic, T. Moreau, M. Cacciotti and 6 other author(s). CoRR, (2018)

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Exploiting Errors for Efficiency: A Survey from Circuits to Applications.

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Disambiguation of "Jevdjic, Djordje"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Exploiting Errors for Efficiency: A Survey from Circuits to Applications.

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Exploiting Errors for Efficiency: A Survey from Circuits to Applications.