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Analyses and architectures for mixed-critical systems: industry trends and research perspective.

, , , , , , and . EMSOFT Companion, page 13. ACM, (2019)

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Auto-SI: An adaptive reconfigurable processor with run-time loop detection and acceleration., , , , , , and . SoCC, page 153-158. IEEE, (2017)Shallow Water Waves on a Deep Technology Stack: Accelerating a Finite Volume Tsunami Model Using Reconfigurable Hardware in Invasive Computing., , , , , , , , , and . Euro-Par Workshops, volume 10659 of Lecture Notes in Computer Science, page 676-687. Springer, (2017)Extending the WCET Problem to Optimize for Runtime-Reconfigurable Processors., , and . ACM Trans. Archit. Code Optim., 13 (4): 45:1-45:24 (2016)Co-Scheduling on Fused CPU-GPU Architectures With Shared Last Level Caches., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 37 (11): 2337-2347 (2018)Easy-to-Use On-the-Fly Binary Program Acceleration on Many-Cores., and . CoRR, (2014)Analyses and architectures for mixed-critical systems: industry trends and research perspective., , , , , , and . EMSOFT Companion, page 13. ACM, (2019)Transparent offloading of computational hotspots from binary code to Xeon Phi., , , and . DATE, page 1078-1083. ACM, (2015)Invasive computing for timing-predictable stream processing on MPSoCs., , , , , , , , , and 7 other author(s). it - Information Technology, 58 (6): 267-280 (2016)Floating point acceleration for stream processing applications in dynamically reconfigurable processors., , , , and . ESTIMedia, page 1-2. IEEE, (2015)Timing Analysis of Tasks on Runtime Reconfigurable Processors., , and . IEEE Trans. VLSI Syst., 25 (1): 294-307 (2017)