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Disambiguation of "Becker, Jürgen"

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Run-Time Resource Allocation for Simultaneous Multi-tasking in Multi-core Reconfigurable Processors.

, , , , , and . FCCM, page 29-32. IEEE Computer Society, (2011)

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Apl. Prof. Dr. Jürgen Pleiss University of Stuttgart

Univ. -Prof. Dr. Jürgen Pafel University of Stuttgart

Dr. rer. nat. Jürgen Steinwandel University of Stuttgart

Hon. -Prof. Dr. Jürgen Hammer University of Stuttgart

Hon. -Prof. Dr. Jürgen Blum University of Stuttgart

 

Other publications of authors with the same name

From Scilab to High Performance Embedded Multicore Systems: The ALMA Approach., , , , , , , , , and 7 other author(s). DSD, page 114-121. IEEE Computer Society, (2012)Prime Field ECDSA Signature Processing for Reconfigurable Embedded Systems., , , , and . Int. J. Reconfig. Comp., (2011)An Interface for a Decentralized 2D Reconfiguration on Xilinx Virtex-FPGAs for Organic Computing., , and . Int. J. Reconfig. Comp., (2009)Current Trends on Reconfigurable Computing., , , , , and . Int. J. Reconfig. Comp., (2008)Operating System for Runtime Reconfigurable Multiprocessor Systems., , , and . Int. J. Reconfig. Comp., (2011)Modeling and Implementation of a Power Estimation Methodology for SystemC., , , and . Int. J. Reconfig. Comp., (2012)Compiling Scilab to high performance embedded multicore systems., , , , , , , , , and 7 other author(s). Microprocessors and Microsystems - Embedded Hardware Design, 37 (8-C): 1033-1049 (2013)A combined lattice BGK/level set method for immiscible two-phase flows., , , , and . Computers & Mathematics with Applications, 58 (5): 950-964 (2009)An Interconnect Strategy for a Heterogeneous, Reconfigurable SoC., , , , , , , , , and 2 other author(s). IEEE Design & Test of Computers, 25 (5): 442-451 (2008)Dynamic and Partial FPGA Exploitation., , , , , and . Proceedings of the IEEE, 95 (2): 438-452 (2007)