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Retraining-based timing error mitigation for hardware neural networks., , , , , , , , , and 1 other author(s). DATE, page 593-596. ACM, (2015)How sensitive is processor customization to the workload's input datasets?, , , , , , and . SASP, page 1-7. IEEE Computer Society, (2011)Statistical performance comparisons of computers., , , , , and . HPCA, page 399-410. IEEE Computer Society, (2012)Load squared: Adding logic close to memory to reduce the latency of indirect loads in embedded and general systems., , and . J. Embedded Computing, 2 (1): 5-14 (2006)ArchExplorer.org: A methodology for facilitating a fair Comparison of research ideas., , and . ISPASS, page 45-54. IEEE Computer Society, (2010)Elastic CGRAs., , , , and . FPGA, page 171-180. ACM, (2013)A Practical Approach for Reconciling High and Predictable Performance in Non-Regular Parallel Programs., , , , , and . DATE, page 740-745. ACM, (2008)An Accelerator for High Efficient Vision Processing., , , , , , , , , and 1 other author(s). IEEE Trans. on CAD of Integrated Circuits and Systems, 36 (2): 227-240 (2017)Cluster Cache Monitor: Leveraging the Proximity Data in CMP., , , , and . International Journal of Parallel Programming, 43 (6): 1054-1077 (2015)DianNao family: energy-efficient hardware accelerators for machine learning., , , , and . Commun. ACM, 59 (11): 105-112 (2016)