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An analog systolic neural processing architecture.

J. Moreno, F. Castillo, J. Cabestany, J. Madrenas, and A. Napieralski. IEEE Micro, 14 (3): 51-59 (1994)

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Dr. Jordi Mauri University of Stuttgart

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Energy optimization of tapered buffers for CMOS on-chip switching power converters.G. Villar, E. Alarcón, J. Madrenas, F. Guinjoan, and A. Poveda. ISCAS (5), page 4453-4456. IEEE, (2005)Mismatch-tolerant CMOS oscillator and excitatory synapse for bioinspired image segmentation.D. Fernández, G. Villar, E. Vidal, E. Alarcón, J. Cosp, and J. Madrenas. ISCAS (4), page 4114-4117. IEEE, (2005)Complexity Reduction of Neural Network Model for Local Motion Detection in Motion Stereo Vision.H. Akima, S. Kawakami, J. Madrenas, S. Moriya, M. Yano, K. Nakajima, M. Sakuraba, and S. Sato. ICONIP (6), volume 10639 of Lecture Notes in Computer Science, page 830-839. Springer, (2017)Optimizing Power Consumption vs. Linearization in CMFB Amplifiers with Source Degeneration.C. Bauza, J. Sánchez-Chiva, J. Madrenas, and D. Fernández. ICECS, page 269-272. IEEE, (2018)Bioinspired Sensory Integration for Environment-Perception Embedded Systems.J. Madrenas, D. Fernández, J. Cosp, J. Moreno, L. Martínez-Alvarado, and G. Sánchez. BIODEVICES, page 260-267. SciTePress, (2011)An analog systolic neural processing architecture.J. Moreno, F. Castillo, J. Cabestany, J. Madrenas, and A. Napieralski. IEEE Micro, 14 (3): 51-59 (1994)SpiNDeK: An Integrated design tool for the multiprocessor emulation of complex bioinspired spiking neural networks.M. Hauptvogel, J. Madrenas, and J. Moreno. IEEE Congress on Evolutionary Computation, page 142-149. IEEE, (2009)A reconfigurable architecture for emulating large-scale bio-inspired systems.J. Moreno, and J. Madrenas. IEEE Congress on Evolutionary Computation, page 126-133. IEEE, (2009)Experiments on the Release of CMOS-Micromachined Metal Layers.D. Fernández, J. Ricart, and J. Madrenas. J. Sensors, (2010)A Novel Hardware Architecture for Self-adaptive Systems.J. Casas, J. Moreno, J. Madrenas, and J. Cabestany. AHS, page 592-599. IEEE Computer Society, (2007)

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Disambiguation of "Madrenas, Jordi"

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An analog systolic neural processing architecture.

Please choose a person to relate this publication to

Dr. Jordi Mauri University of Stuttgart

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PUMA

Disambiguation of "Madrenas, Jordi"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML An analog systolic neural processing architecture.

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Dr. Jordi Mauri University of Stuttgart

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An analog systolic neural processing architecture.