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Built-in self test design of power switch with clock-gated charge/discharge transistor.

C. Xin, W. Ning, B. Na, H. Hui, and H. Wei. IET Computers & Digital Techniques, 8 (2): 59-69 (2014)

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Dr. phil. Rukmani Bai University of Stuttgart

Univ. -Prof. Dr. Na Liu University of Stuttgart

Prof. iR Dr. -Ing. Utz Baitinger University of Stuttgart

Isela Bailey Loya University of Stuttgart

Dr. Rainer Nägele University of Stuttgart

Vernetzte Wertschöpfung : Was wir vom Persuasive Design für die Gestaltung der Ressourcenintegration in Service-Ökosystemen lernen könnenK. Hölzle, S. Hermann, A. Schletz, and R. Nägele. Gestaltung des Wandels im Dienstleistungsmanagement, volume 1 : Innovationsperspektive - Digitalisierungsperspektive - Nachhaltigkeitsperspektive of Forum Dienstleistungsmanagement, Springer Gabler, Wiesbaden, (2023)

Other publications of authors with the same name

Built-in self test design of power switch with clock-gated charge/discharge transistor.C. Xin, W. Ning, B. Na, H. Hui, and H. Wei. IET Computers & Digital Techniques, 8 (2): 59-69 (2014)Bitline Leakage Current Compensation Circuit for High-Performance SRAM Design.R. Lu, N. Bai, B. Lv, J. Zhu, and X. Wu. NAS, page 109-113. IEEE Computer Society, (2012)A Multiple-Stage Parallel Replica-Bitline Delay Addition Technique for Reducing Timing Variation of SRAM Sense Amplifiers.J. Wu, J. Zhu, Y. Xia, and N. Bai. IEEE Trans. on Circuits and Systems, 61-II (4): 264-268 (2014)An Efficient and Flexible Embedded Memory IP Compiler.M. Chen, and B. Na. CyberC, page 268-273. IEEE Computer Society, (2012)A low active and leakage power SRAM using a read and write divided and BIST programmable timing control circuit.J. Zhu, N. Bai, and J. Wu. Microelectronics Journal, 44 (4): 283-291 (2013)Logic Design and Power Optimization of Floating-Point Multipliers.N. Bai, H. Li, J. Lv, S. Yang, and Y. Xu. Comput. Intell. Neurosci., (2022)A differential read subthreshold SRAM bitcell with self-adaptive leakage cut off scheme.B. Na, X. Chen, Y. Jun, and L. Shi. SoCC, page 455-460. IEEE, (2010)

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Disambiguation of "Na, Bai"

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Built-in self test design of power switch with clock-gated charge/discharge transistor.

Please choose a person to relate this publication to

Dr. phil. Rukmani Bai University of Stuttgart

Univ. -Prof. Dr. Na Liu University of Stuttgart

Prof. iR Dr. -Ing. Utz Baitinger University of Stuttgart

Isela Bailey Loya University of Stuttgart

Dr. Rainer Nägele University of Stuttgart

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Na, Bai"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Built-in self test design of power switch with clock-gated charge/discharge transistor.

Please choose a person to relate this publication to

Dr. phil. Rukmani Bai University of Stuttgart

Univ. -Prof. Dr. Na Liu University of Stuttgart

Prof. iR Dr. -Ing. Utz Baitinger University of Stuttgart

Isela Bailey Loya University of Stuttgart

Dr. Rainer Nägele University of Stuttgart

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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Built-in self test design of power switch with clock-gated charge/discharge transistor.