Author of the publication

An efficient ILP-based scheduling algorithm for control-dominated VHDL descriptions.

, , and . ACM Trans. Design Autom. Electr. Syst., 2 (4): 344-364 (1997)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Embedded DRAM Development: Technology, Physical Design, and Application Issues., and . IEEE Design & Test of Computers, 18 (3): 7-15 (2001)Fully integrated UWB impulse transmitter and 402-to-405MHz super-regenerative receiver for medical implant devices., , and . ISCAS, page 1213-1215. IEEE, (2010)Network-on-chip-centric approach to interleaving in high throughput channel decoders., , and . ISCAS (2), page 1766-1769. IEEE, (2005)A Custom Computing System for Finding Similarties in Complex Networks., , , , , , and . ISVLSI, page 262-267. IEEE Computer Society, (2015)ASIC design of a Gbit/s LDPC decoder for iterative MIMO systems., , , , and . ICNC, page 192-197. IEEE Computer Society, (2012)A Hardware Efficient Random Number Generator for Nonuniform Distributions with Arbitrary Precision., , , , , , and . Int. J. Reconfig. Comp., (2012)Design Space of Flexible Multigigabit LDPC Decoders., , , and . VLSI Design, (2012)DRAMSys: A Flexible DRAM Subsystem Design Space Exploration Framework., , and . IPSJ Trans. System LSI Design Methodology, (2015)Advanced hardware architecture for soft decoding Reed-Solomon codes., and . ISTC, page 22-26. IEEE, (2014)Advanced iterative channel coding schemes: When Shannon meets Moore., , and . ISTC, page 406-411. IEEE, (2016)