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Competitive Learning Algorithms and Neurocomputer Architecture.

, , , and . IEEE Trans. Computers, 47 (8): 847-858 (1998)

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Phatpackets for Data Transport within an HPC Network., and . IASTED PDCS, page 154-160. IASTED/ACTA Press, (2002)Dual Systolic Architectures for VLSI Digital Signal Processing Systems., , , , , and . IEEE Trans. Computers, 35 (10): 916-923 (1986)Importance Sampling for Ising Computers Using One-Dimensional Cellular Automata., , , and . IEEE Trans. Computers, 38 (6): 769-774 (1989)Parallel Random Number Generation for VLSI Systems Using Cellular Automata., , and . IEEE Trans. Computers, 38 (10): 1466-1473 (1989)Vehicular telematics over heterogeneous wireless networks: A survey., , , , , , and . Computer Communications, 33 (7): 775-793 (2010)Contributions to VLSI computational complexity theory from bounds on current density., , and . Integration, 4 (2): 175-183 (1986)Communication issues within high performance computing grids., , , and . IJHPCN, 4 (5/6): 248-255 (2006)iSCSI Simulation for Internet Applications., , and . International Conference on Internet Computing, page 285-289. CSREA Press, (2004)Reducing Latency on the Internet using "Component-Based Download" and "File-Segment Transfer Protocol"., , and . International Conference on Internet Computing, page 465-472. CSREA Press, (2000)Adaptive Network Load Balancing in Phatpackets., and . Communications, Internet, and Information Technology, page 154-159. IASTED/ACTA Press, (2002)