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A Reconfiguration-Aware Floorplacer for FPGAs., , , and . ReConFig, page 109-114. IEEE Computer Society, (2008)An ILP Formulation for the Task Graph Scheduling Problem Tailored to Bi-Dimensional Reconfigurable Architectures., , and . Int. J. Reconfig. Comp., (2009)Partitioning and Scheduling of Task Graphs on Partially Dynamically Reconfigurable FPGAs., , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 28 (5): 662-675 (2009)Task Scheduling with Configuration Prefetching and Anti-Fragmentation techniques on Dynamically Reconfigurable Systems., , and . DATE, page 519-522. ACM, (2008)An ILP Formulation for the Task Graph Scheduling Problem Tailored to Bi-dimensional Reconfigurable Architectures., , and . ReConFig, page 97-102. IEEE Computer Society, (2008)Floorplacement for Partial Reconfigurable FPGA-Based Systems., , , and . Int. J. Reconfig. Comp., (2011)The Shining embedded system design methodology based on self dynamic reconfigurable architectures., , , , , and . ASP-DAC, page 595-600. IEEE, (2008)A design workflow for dynamically reconfigurable multi-FPGA systems., , , , and . VLSI-SoC, page 414-419. IEEE, (2010)