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Disambiguation of "Balakrishnan, M."

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Performance-Energy Trade-off in CMPs with Per-Core DVFS.

, , and . ARCS, volume 10793 of Lecture Notes in Computer Science, page 225-238. Springer, (2018)

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M. Fittingho

M. Nudischer

M. Kratzer

M. Liewald

M. Christmann

 

Other publications of authors with the same name

Mapping Tasks to a Dynamically Reconfigurable Coarse Grained Array., , and . FCCM, page 33. IEEE Computer Society, (2014)Exploring Storage Organization in ASIP Synthesis., , and . DSD, page 120-127. IEEE Computer Society, (2003)A Specialized Graduate Program in VLSI Design: A Success Story.. MSE, page 85-86. IEEE Computer Society, (2001)Buffer constraints in a variable-rate packetized video system.. ICIP, page 29-32. IEEE Computer Society, (1995)Allocation of multiport memories in data path synthesis., , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 7 (4): 536-540 (1988)PLSS: A Scheduler for Multi-core Embedded Systems., , and . ARCS, volume 10172 of Lecture Notes in Computer Science, page 164-176. Springer, (2017)A New Performance Evaluation Approach for System Level Design Space Exploration., , and . ISSS, page 180-185. ACM / IEEE Computer Society, (2002)Partial Reconfiguration for Dynamic Mapping of Task Graphs onto 2D Mesh Platform., , and . ARC, volume 9040 of Lecture Notes in Computer Science, page 373-382. Springer, (2015)Speeding up power estimation of embedded software., , and . ISLPED, page 191-196. ACM, (2000)Unified Architecture for Double/Two-Parallel Single Precision Floating Point Adder., , , and . IEEE Trans. on Circuits and Systems, 61-II (7): 521-525 (2014)