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A 0.78-µW 96-Ch. Deep Sub-Vt Neural Spike Processor Integrated with a Nanowatt Power Management Unit.

J. Li, P. Chundi, S. Kim, Z. Jiang, M. Yang, J. Kang, S. Jung, S. Kim, and M. Seok. ESSCIRC, page 154-157. IEEE, (2018)

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Chenming Jiang University of Stuttgart

Other publications of authors with the same name

An Empirical Study of Qualities of Association Rules from a Statistical View Point.M. Dorn, Z. Jiang, W. Hou, and C. Wang. Computers and Their Applications, page 404-409. ISCA, (2005)Estimating XML Structural Join Size Quickly and Economically.C. Luo, Z. Jiang, W. Hou, F. Yan, and C. Wang. ICDE, page 62. IEEE Computer Society, (2006)Applying Cosine Series to XML Structural Join Size Estimation.C. Luo, Z. Jiang, W. Hou, Q. Zhu, and C. Wang. DEXA, volume 4080 of Lecture Notes in Computer Science, page 761-770. Springer, (2006)A sampling approach for skyline query cardinality estimation.C. Luo, Z. Jiang, W. Hou, S. He, and Q. Zhu. Knowl. Inf. Syst., 32 (2): 281-301 (2012)C3SRAM: In-Memory-Computing SRAM Macro Based on Capacitive-Coupling Computing.Z. Jiang, S. Yin, J. Seo, and M. Seok. ESSCIRC, page 131-134. IEEE, (2019)IRTA: An Improved Threshold Algorithm for Reverse Top-k Queries.C. Luo, F. Yu, W. Hou, Z. Jiang, D. Che, and S. He. ICEIS (1), page 135-140. SciTePress, (2011)The Design of an Interactive Approach to Statistical Data Mining.Z. Jiang, C. Wang, and W. Hou. IKE, page 73-79. CSREA Press, (2005)A Framework for Clustering on Data Streams.Z. Jiang, W. Hou, C. Wang, H. Wang, and J. Chen. Computers and Their Applications, page 41-46. ISCA, (2006)A 0.78-µW 96-Ch. Deep Sub-Vt Neural Spike Processor Integrated with a Nanowatt Power Management Unit.J. Li, P. Chundi, S. Kim, Z. Jiang, M. Yang, J. Kang, S. Jung, S. Kim, and M. Seok. ESSCIRC, page 154-157. IEEE, (2018)Approximate Range-Sum Queries over Data Cubes Using Cosine Transform.W. Hou, C. Luo, Z. Jiang, F. Yan, and Q. Zhu. DEXA, volume 5181 of Lecture Notes in Computer Science, page 376-389. Springer, (2008)

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Disambiguation of "Jiang, Zhewei"

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A 0.78-µW 96-Ch. Deep Sub-Vt Neural Spike Processor Integrated with a Nanowatt Power Management Unit.

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Chenming Jiang University of Stuttgart

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Disambiguation of "Jiang, Zhewei"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 0.78-µW 96-Ch. Deep Sub-Vt Neural Spike Processor Integrated with a Nanowatt Power Management Unit.

Please choose a person to relate this publication to

Chenming Jiang University of Stuttgart

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Disambiguation

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A 0.78-µW 96-Ch. Deep Sub-Vt Neural Spike Processor Integrated with a Nanowatt Power Management Unit.